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authorSander de Smalen <sander.desmalen@arm.com>2018-04-11 07:36:10 +0000
committerSander de Smalen <sander.desmalen@arm.com>2018-04-11 07:36:10 +0000
commit73937b7c9de865eaec7f708f643b6ff9aa800448 (patch)
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parent23db1744f11677370d51f04d938b7d19d4daade7 (diff)
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[AArch64][AsmParser] Unify code for parsing Neon/SVE vectors.
Summary: Merged 'tryMatchVectorRegister' (specific to Neon) and 'tryParseSVERegister' into a single 'tryParseVectorRegister' function, and created a generic 'parseVectorKind()' function that returns the #Elements and ElementWidth of a vector suffix. This reduces the duplication of this functionality between two the vector implementations. This is patch [1/6] in a series to add assembler/disassembler support for SVE's contiguous ST1 (scalar+imm) instructions. Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro Reviewed By: fhahn Subscribers: tschuett, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45427 llvm-svn: 329782
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