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| author | CarolineConcatto <51754594+CarolineConcatto@users.noreply.github.com> | 2023-09-12 18:08:57 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-09-12 18:08:57 +0100 |
| commit | dc8d2ecc5e56318ee2aa9fdb4945a07b26d635a0 (patch) | |
| tree | 8917084bcb609b1b6b5489cd1fa28bae9ce0706c /clang/tools/include-mapping/cppreference_parser.py | |
| parent | 4d5906e0bf27b7aea451cf60e0d38a01f9b96085 (diff) | |
| download | llvm-dc8d2ecc5e56318ee2aa9fdb4945a07b26d635a0.zip llvm-dc8d2ecc5e56318ee2aa9fdb4945a07b26d635a0.tar.gz llvm-dc8d2ecc5e56318ee2aa9fdb4945a07b26d635a0.tar.bz2 | |
[AArch64][SME]Update intrinsic interface for read/write (#65594)
The new ACLE PR#225[1] now combines the slice parameters for some
builtins. This patch is the #2 of 3 patches to update the interface.
Slice specifies the ZA slice number directly and needs to be explicity
implemented by the "user" with the base register plus the immediate
offset
[1]https://github.com/ARM-software/acle/pull/225/files
Diffstat (limited to 'clang/tools/include-mapping/cppreference_parser.py')
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