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authorAlbion Fung <conanap@lep82435v.canlab.ibm.com>2020-10-16 18:03:09 -0400
committerAlbion Fung <conanap@lep82435v.canlab.ibm.com>2020-10-16 18:03:22 -0400
commitd30155feaa9c4ddd09cb115fb30ea5810f63af9c (patch)
tree2432bc3e891dcac3c10d1048265d6aeb3a7ab4f2 /clang/lib
parentc096377905db8144ed310247609134783b2c9b73 (diff)
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[PowerPC] Implementation of 128-bit Binary Vector Rotate builtins
This patch implements 128-bit Binary Vector Rotate builtins for PowerPC10. Differential Revision: https://reviews.llvm.org/D86819
Diffstat (limited to 'clang/lib')
-rw-r--r--clang/lib/Headers/altivec.h64
1 files changed, 64 insertions, 0 deletions
diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 1d7bc20..2df420d 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -7927,6 +7927,18 @@ vec_rl(vector unsigned long long __a, vector unsigned long long __b) {
}
#endif
+#ifdef __POWER10_VECTOR__
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_rl(vector signed __int128 __a, vector unsigned __int128 __b) {
+ return (__b << __a)|(__b >> ((__CHAR_BIT__ * sizeof(vector signed __int128)) - __a));
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_rl(vector unsigned __int128 __a, vector unsigned __int128 __b) {
+ return (__b << __a)|(__b >> ((__CHAR_BIT__ * sizeof(vector unsigned __int128)) - __a));
+}
+#endif
+
/* vec_rlmi */
#ifdef __POWER9_VECTOR__
static __inline__ vector unsigned int __ATTRS_o_ai
@@ -7940,8 +7952,24 @@ vec_rlmi(vector unsigned long long __a, vector unsigned long long __b,
vector unsigned long long __c) {
return __builtin_altivec_vrldmi(__a, __c, __b);
}
+#endif
+
+#ifdef __POWER10_VECTOR__
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_rlmi(vector unsigned __int128 __a, vector unsigned __int128 __b,
+ vector unsigned __int128 __c) {
+ return __builtin_altivec_vrlqmi(__a, __c, __b);
+}
+
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_rlmi(vector signed __int128 __a, vector signed __int128 __b,
+ vector signed __int128 __c) {
+ return __builtin_altivec_vrlqmi(__a, __c, __b);
+}
+#endif
/* vec_rlnm */
+#ifdef __POWER9_VECTOR__
static __inline__ vector unsigned int __ATTRS_o_ai
vec_rlnm(vector unsigned int __a, vector unsigned int __b,
vector unsigned int __c) {
@@ -7957,6 +7985,42 @@ vec_rlnm(vector unsigned long long __a, vector unsigned long long __b,
}
#endif
+#ifdef __POWER10_VECTOR__
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_rlnm(vector unsigned __int128 __a, vector unsigned __int128 __b,
+ vector unsigned __int128 __c) {
+ // Merge __b and __c using an appropriate shuffle.
+ vector unsigned char TmpB = (vector unsigned char)__b;
+ vector unsigned char TmpC = (vector unsigned char)__c;
+ vector unsigned char MaskAndShift =
+#ifdef __LITTLE_ENDIAN__
+ __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, -1, -1, -1, 16, 0,
+ 1, -1, -1, -1, -1, -1);
+#else
+ __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, 31, 30, 15, -1,
+ -1, -1, -1, -1, -1, -1, -1);
+#endif
+ return __builtin_altivec_vrlqnm(__a, (vector unsigned __int128) MaskAndShift);
+}
+
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_rlnm(vector signed __int128 __a, vector signed __int128 __b,
+ vector signed __int128 __c) {
+ // Merge __b and __c using an appropriate shuffle.
+ vector unsigned char TmpB = (vector unsigned char)__b;
+ vector unsigned char TmpC = (vector unsigned char)__c;
+ vector unsigned char MaskAndShift =
+#ifdef __LITTLE_ENDIAN__
+ __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, -1, -1, -1, 16, 0,
+ 1, -1, -1, -1, -1, -1);
+#else
+ __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, 31, 30, 15, -1,
+ -1, -1, -1, -1, -1, -1, -1);
+#endif
+ return __builtin_altivec_vrlqnm(__a, (vector unsigned __int128) MaskAndShift);
+}
+#endif
+
/* vec_vrlb */
static __inline__ vector signed char __ATTRS_o_ai