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| author | Craig Topper <craig.topper@intel.com> | 2017-08-30 04:34:48 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-30 04:34:48 +0000 |
| commit | 641e2af9e8c41b11cda62c715909de882fd7915f (patch) | |
| tree | c0af03f1d9b01aa260910876e428016457c7c4dd /clang/lib/Serialization/ModuleManager.cpp | |
| parent | 3cb61634ff3795ef65b1f618d3809053b6a0a515 (diff) | |
| download | llvm-641e2af9e8c41b11cda62c715909de882fd7915f.zip llvm-641e2af9e8c41b11cda62c715909de882fd7915f.tar.gz llvm-641e2af9e8c41b11cda62c715909de882fd7915f.tar.bz2 | |
[X86] Provide a separate feature bit for macro fusion support instead of basing it on the AVX flag
Summary:
Currently we determine if macro fusion is supported based on the AVX flag as a proxy for the processor being Sandy Bridge".
This is really strange as now AMD supports AVX. It also means if user explicitly disables AVX we disable macro fusion.
This patch adds an explicit macro fusion feature. I've also enabled for the generic 64-bit CPU (which doesn't have AVX)
This is probably another candidate for being in the MI layer, but for now I at least wanted to correct the overloading of the AVX feature.
Reviewers: spatel, chandlerc, RKSimon, zvi
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37280
llvm-svn: 312097
Diffstat (limited to 'clang/lib/Serialization/ModuleManager.cpp')
0 files changed, 0 insertions, 0 deletions