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authorJob Noorman <jnoorman@igalia.com>2023-05-17 11:43:38 +0200
committerJob Noorman <jnoorman@igalia.com>2023-05-17 11:43:39 +0200
commited90cf1873aa696f7c99ea2eafc540206c2391e1 (patch)
treed56951a2a836f2a516fbb65f850ec3be4cde0cbd /clang/lib/Serialization/GlobalModuleIndex.cpp
parentd045f1d393317962251ba6dc58e3f8edc7e2fd99 (diff)
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[RISCV][MC] Refine MCInstrAnalysis based on registers used
MCInstrAnalysis provides a number of methods to query properties of instructions (e.g., isTerminator(), isCall(),...). The default implementation of these methods forwards the query to MCInstrDesc which returns information based on various RISCVInstrInfo*.td files. Since the info in MCInstrDesc is based on opcodes only, it is often quite inaccurate. For example, JAL/JALR are never recognized as terminators or branches while they certainly can be. However, MCInstrAnalysis has access to the full MCInst so can improve accuracy by inspecting registers used by the instruction. This patch refines the following MCInstrAnalysis methods: - isTerminator: JAL/JALR with RD=X0; - isCall: JAL/JALR with RD!=X0 - isReturn: JALR/C_JR with RD=X0, RS1 in {X1, X5} - isBranch: JAL/JALR/C_JR with RD=X0, RS1 not in {X1, X5}; - isUnconditionalBranch: JAL/JALR/C_JR with RD=X0, RS1 not in {X1, X5}; - isIndirectBranch: JALR/C_JR with RD=X0, RS1 not in {X1, X5}; Note that the reason for this patch is to simplify the RISCV target in BOLT. While it's possible to implement everything there, it seems more logical to implement it directly in the RISCV backend as other tools might also be able to benefit from it. Reviewed By: craig.topper, MaskRay Differential Revision: https://reviews.llvm.org/D146438
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