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| author | eopXD <yueh.ting.chen@gmail.com> | 2023-07-07 02:00:16 -0700 |
|---|---|---|
| committer | eopXD <yueh.ting.chen@gmail.com> | 2023-07-09 08:40:36 -0700 |
| commit | 5704630ec40dbf1ebc7b16181b226e1545f8eb5c (patch) | |
| tree | 7dc9be61ccc4fdc64f01955fc2b5e9b0f13f1fbb /clang/lib/Sema/SemaChecking.cpp | |
| parent | 7428739ea81e1508b8da92e1561574216857a897 (diff) | |
| download | llvm-5704630ec40dbf1ebc7b16181b226e1545f8eb5c.zip llvm-5704630ec40dbf1ebc7b16181b226e1545f8eb5c.tar.gz llvm-5704630ec40dbf1ebc7b16181b226e1545f8eb5c.tar.bz2 | |
[RISCV] Remove redundant _ta suffix in RVV intrinsics builtins. NFC
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D154693
Diffstat (limited to 'clang/lib/Sema/SemaChecking.cpp')
| -rw-r--r-- | clang/lib/Sema/SemaChecking.cpp | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 294d9bf..3284cf1 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -4697,24 +4697,24 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCV::BI__builtin_riscv_aes64ks1i_64: return SemaBuiltinConstantArgRange(TheCall, 1, 0, 10); // Check if value range for vxrm is in [0, 3] - case RISCVVector::BI__builtin_rvv_vaaddu_vv_ta: - case RISCVVector::BI__builtin_rvv_vaaddu_vx_ta: - case RISCVVector::BI__builtin_rvv_vaadd_vv_ta: - case RISCVVector::BI__builtin_rvv_vaadd_vx_ta: - case RISCVVector::BI__builtin_rvv_vasubu_vv_ta: - case RISCVVector::BI__builtin_rvv_vasubu_vx_ta: - case RISCVVector::BI__builtin_rvv_vasub_vv_ta: - case RISCVVector::BI__builtin_rvv_vasub_vx_ta: - case RISCVVector::BI__builtin_rvv_vsmul_vv_ta: - case RISCVVector::BI__builtin_rvv_vsmul_vx_ta: - case RISCVVector::BI__builtin_rvv_vssra_vv_ta: - case RISCVVector::BI__builtin_rvv_vssra_vx_ta: - case RISCVVector::BI__builtin_rvv_vssrl_vv_ta: - case RISCVVector::BI__builtin_rvv_vssrl_vx_ta: - case RISCVVector::BI__builtin_rvv_vnclip_wv_ta: - case RISCVVector::BI__builtin_rvv_vnclip_wx_ta: - case RISCVVector::BI__builtin_rvv_vnclipu_wv_ta: - case RISCVVector::BI__builtin_rvv_vnclipu_wx_ta: + case RISCVVector::BI__builtin_rvv_vaaddu_vv: + case RISCVVector::BI__builtin_rvv_vaaddu_vx: + case RISCVVector::BI__builtin_rvv_vaadd_vv: + case RISCVVector::BI__builtin_rvv_vaadd_vx: + case RISCVVector::BI__builtin_rvv_vasubu_vv: + case RISCVVector::BI__builtin_rvv_vasubu_vx: + case RISCVVector::BI__builtin_rvv_vasub_vv: + case RISCVVector::BI__builtin_rvv_vasub_vx: + case RISCVVector::BI__builtin_rvv_vsmul_vv: + case RISCVVector::BI__builtin_rvv_vsmul_vx: + case RISCVVector::BI__builtin_rvv_vssra_vv: + case RISCVVector::BI__builtin_rvv_vssra_vx: + case RISCVVector::BI__builtin_rvv_vssrl_vv: + case RISCVVector::BI__builtin_rvv_vssrl_vx: + case RISCVVector::BI__builtin_rvv_vnclip_wv: + case RISCVVector::BI__builtin_rvv_vnclip_wx: + case RISCVVector::BI__builtin_rvv_vnclipu_wv: + case RISCVVector::BI__builtin_rvv_vnclipu_wx: return SemaBuiltinConstantArgRange(TheCall, 2, 0, 3); case RISCVVector::BI__builtin_rvv_vaaddu_vv_tu: case RISCVVector::BI__builtin_rvv_vaaddu_vx_tu: |