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| author | eopXD <yueh.ting.chen@gmail.com> | 2023-07-06 00:59:20 -0700 |
|---|---|---|
| committer | eopXD <yueh.ting.chen@gmail.com> | 2023-07-13 00:51:51 -0700 |
| commit | 51b9e336619b09305357e5ec43f64890d4965e20 (patch) | |
| tree | 09dc1f013ad945e722dce1887fbc1474e345dc5e /clang/lib/Sema/SemaChecking.cpp | |
| parent | 4085b23609e913ba6945a9451087f711a86d9d4d (diff) | |
| download | llvm-51b9e336619b09305357e5ec43f64890d4965e20.zip llvm-51b9e336619b09305357e5ec43f64890d4965e20.tar.gz llvm-51b9e336619b09305357e5ec43f64890d4965e20.tar.bz2 | |
[6/8][RISCV] Add rounding mode control variant for vfsqrt, vfrec7
Depends on D154633
For the cover letter of the patch-set, please checkout D154628.
This is the 6th patch of the patch-set.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D154634
Diffstat (limited to 'clang/lib/Sema/SemaChecking.cpp')
| -rw-r--r-- | clang/lib/Sema/SemaChecking.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 774b38b..5781b0a 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -4808,6 +4808,9 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vnclipu_wv_tumu: case RISCVVector::BI__builtin_rvv_vnclipu_wx_tumu: return SemaBuiltinConstantArgRange(TheCall, 4, 0, 3); + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm: + return SemaBuiltinConstantArgRange(TheCall, 1, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm: @@ -4828,6 +4831,10 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm: case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm: case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm: + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_tu: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_tu: + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_tama: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_tama: return SemaBuiltinConstantArgRange(TheCall, 2, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tu: @@ -4917,6 +4924,12 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_tama: case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_tama: case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_tama: + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_tum: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_tum: + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_mu: + case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_mu: return SemaBuiltinConstantArgRange(TheCall, 3, 0, 4); case RISCVVector::BI__builtin_rvv_vfmacc_vv_rm_tama: case RISCVVector::BI__builtin_rvv_vfmacc_vf_rm_tama: |