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author | eopXD <yueh.ting.chen@gmail.com> | 2023-07-04 02:09:34 -0700 |
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committer | eopXD <yueh.ting.chen@gmail.com> | 2023-07-13 00:43:54 -0700 |
commit | 1a905e82389264fd8ed9a1dee052e46cb03c9709 (patch) | |
tree | a222c2737fd6cc8dd717afe5a0d101e8f2bc6f20 /clang/lib/Sema/SemaChecking.cpp | |
parent | 00093667b1bdc957e9354461ee817518517de637 (diff) | |
download | llvm-1a905e82389264fd8ed9a1dee052e46cb03c9709.zip llvm-1a905e82389264fd8ed9a1dee052e46cb03c9709.tar.gz llvm-1a905e82389264fd8ed9a1dee052e46cb03c9709.tar.bz2 |
[3/8][RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul
Depends on D154629
For the cover letter of the patch-set, please checkout D154628.
This is the 3rd patch of the patch-set.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D154631
Diffstat (limited to 'clang/lib/Sema/SemaChecking.cpp')
-rw-r--r-- | clang/lib/Sema/SemaChecking.cpp | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 02a19e0..943b573 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -4821,6 +4821,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm: return SemaBuiltinConstantArgRange(TheCall, 2, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tu: @@ -4835,6 +4842,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm_tu: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm_tu: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_tu: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm_tu: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_tu: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_tu: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tama: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tama: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_tama: @@ -4848,6 +4862,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm_tama: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm_tama: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_tama: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_tama: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_tama: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm_tama: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm_tama: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_tama: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_tama: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_tama: return SemaBuiltinConstantArgRange(TheCall, 3, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tum: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tum: @@ -4862,6 +4883,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm_tum: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm_tum: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_tum: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_tum: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_tum: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm_tum: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm_tum: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_tum: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_tum: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_tum: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tumu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tumu: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_tumu: @@ -4875,6 +4903,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm_tumu: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm_tumu: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_tumu: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_mu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_mu: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_mu: @@ -4888,6 +4923,13 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwadd_wf_rm_mu: case RISCVVector::BI__builtin_rvv_vfwsub_wv_rm_mu: case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_mu: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_mu: + case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_mu: + case RISCVVector::BI__builtin_rvv_vfdiv_vv_rm_mu: + case RISCVVector::BI__builtin_rvv_vfdiv_vf_rm_mu: + case RISCVVector::BI__builtin_rvv_vfrdiv_vf_rm_mu: + case RISCVVector::BI__builtin_rvv_vfwmul_vv_rm_mu: + case RISCVVector::BI__builtin_rvv_vfwmul_vf_rm_mu: return SemaBuiltinConstantArgRange(TheCall, 4, 0, 4); case RISCV::BI__builtin_riscv_ntl_load: case RISCV::BI__builtin_riscv_ntl_store: |