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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2020-04-23 15:10:25 -0700 |
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| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2020-04-28 16:16:04 -0700 |
| commit | 26777ad7a0916ad7853aa9229bb8ec0346c68a61 (patch) | |
| tree | f75a1d68abce474b20cc4b3c6013af8f2ca0af4c /clang/lib/Lex/ModuleMap.cpp | |
| parent | 6b01964271b92e9986bcf9412254dcf65559bba8 (diff) | |
| download | llvm-26777ad7a0916ad7853aa9229bb8ec0346c68a61.zip llvm-26777ad7a0916ad7853aa9229bb8ec0346c68a61.tar.gz llvm-26777ad7a0916ad7853aa9229bb8ec0346c68a61.tar.bz2 | |
[AMDGPU] Adapt GCNRegBankReassign for 16 bit subregs
It allows it not to crash and analyze 16 bit subregs if those
appear in the instructions. At the same time it does not attempt
to reassign these. It still can correctly identify register
banks to let larger registers to be reassigned.
More work will be needed here when real instructions will use
these registers and more tests as well.
Differential Revision: https://reviews.llvm.org/D78772
Diffstat (limited to 'clang/lib/Lex/ModuleMap.cpp')
0 files changed, 0 insertions, 0 deletions