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| author | David Sherwood <david.sherwood@arm.com> | 2022-02-02 09:02:16 +0000 |
|---|---|---|
| committer | David Sherwood <david.sherwood@arm.com> | 2022-02-08 15:37:52 +0000 |
| commit | eabae1b0175691d1f979299b22a25ed4474864a0 (patch) | |
| tree | d707f39bd89e9897f6f5d2b037c2b42485cfe8ce /clang/lib/Frontend/InitPreprocessor.cpp | |
| parent | 1096fcff7d1061f0fcb04196f4ee2ec59033c6bc (diff) | |
| download | llvm-eabae1b0175691d1f979299b22a25ed4474864a0.zip llvm-eabae1b0175691d1f979299b22a25ed4474864a0.tar.gz llvm-eabae1b0175691d1f979299b22a25ed4474864a0.tar.bz2 | |
[AArch64][CodeGen] Always use SVE (when enabled) to lower 64-bit vector multiplies
This patch adds custom lowering support for ISD::MUL with v1i64 and v2i64
types when SVE is enabled, regardless of the minimum SVE vector length. We
do this because NEON simply does not have 64-bit vector multiplies, so we
want to take advantage of these instructions in SVE.
I've updated the 128-bit min SVE vector bits tests here:
CodeGen/AArch64/sve-fixed-length-int-arith.ll
CodeGen/AArch64/sve-fixed-length-int-mulh.ll
CodeGen/AArch64/sve-fixed-length-int-rem.ll
Differential Revision: https://reviews.llvm.org/D118802
Diffstat (limited to 'clang/lib/Frontend/InitPreprocessor.cpp')
0 files changed, 0 insertions, 0 deletions