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| author | Douglas Yung <douglas.yung@sony.com> | 2022-02-18 01:48:13 -0800 |
|---|---|---|
| committer | Douglas Yung <douglas.yung@sony.com> | 2022-02-18 01:48:58 -0800 |
| commit | acc08a2f1bd35a6046bffd7030bf3990ddd595c7 (patch) | |
| tree | cbabb14dac0675d0b0669e5e426abaeab7f0f9af /clang/lib/Frontend/InitPreprocessor.cpp | |
| parent | 074d1e2536343b96ff1c6de57c4fecf1b7fbfa72 (diff) | |
| download | llvm-acc08a2f1bd35a6046bffd7030bf3990ddd595c7.zip llvm-acc08a2f1bd35a6046bffd7030bf3990ddd595c7.tar.gz llvm-acc08a2f1bd35a6046bffd7030bf3990ddd595c7.tar.bz2 | |
Add "REQUIRES: asserts" to test misched-predicate-virtreg.mir which uses "-debug-only".
Diffstat (limited to 'clang/lib/Frontend/InitPreprocessor.cpp')
0 files changed, 0 insertions, 0 deletions