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| author | R <rqou00@gmail.com> | 2024-07-10 14:33:15 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-10 14:33:15 +0100 |
| commit | 8b511e14770781bd31b0c03bad790bdd82793dac (patch) | |
| tree | a0fee27c223278ad0d61f92424ed37d0705aeca3 /clang/lib/Frontend/InitPreprocessor.cpp | |
| parent | d521324e9fa89f2db8229fb1327c7d45df0ff3cc (diff) | |
| download | llvm-8b511e14770781bd31b0c03bad790bdd82793dac.zip llvm-8b511e14770781bd31b0c03bad790bdd82793dac.tar.gz llvm-8b511e14770781bd31b0c03bad790bdd82793dac.tar.bz2 | |
[RISCV] Fix 0-offset aliases for compressed sp-based opcodes (#98034)
The "26.3.1. Stack-Pointer-Based Loads and Stores" compressed opcodes
have access to all registers (except x0). Fix the opcode aliases with 0
offset so that the aliases also work for all registers, not only the RVC
registers.
Previously, LLVM would accept e.g. `c.lwsp x8, (sp)` but not e.g.
`c.lwsp x18, (sp)`, even though e.g. `c.lwsp x18, 0(sp)` would be
accepted.
This was noticed while implementing
https://github.com/llvm/llvm-project/pull/97925 . The implementation in
that other PR is indeed correct (i.e `qk.c.lhusp` et al are restricted
to the RVC registers).
Diffstat (limited to 'clang/lib/Frontend/InitPreprocessor.cpp')
0 files changed, 0 insertions, 0 deletions