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| author | Monad <yanwqmonad@gmail.com> | 2024-06-12 14:33:12 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-12 14:33:12 +0800 |
| commit | 2fe72385a4964f80e7a1c5abcd426455e4127c03 (patch) | |
| tree | 046db20ef8445e75edde8346f3a99d5186d6f402 /clang/lib/Frontend/InitPreprocessor.cpp | |
| parent | 4b24c2dfb5c02896ec2e9855ac72eb0771d0764d (diff) | |
| download | llvm-2fe72385a4964f80e7a1c5abcd426455e4127c03.zip llvm-2fe72385a4964f80e7a1c5abcd426455e4127c03.tar.gz llvm-2fe72385a4964f80e7a1c5abcd426455e4127c03.tar.bz2 | |
[RISCV] Add Smcsrind and Sscsrind extension (#93952)
Specification link:
https://github.com/riscv/riscv-isa-manual/blob/main/src/indirect-csr.adoc
Some CSRs (`*ireg` and `*iselect`) in Smcsrind/Sscsrind extensions are
originally defined as part of the Smaia/Ssaia extensions and are already
supported in LLVM. The missing CSRs (`*ireg2` to `*ireg6` for `m`, `s`,
and `vs`) are added in this PR.
Diffstat (limited to 'clang/lib/Frontend/InitPreprocessor.cpp')
0 files changed, 0 insertions, 0 deletions