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| author | zhongyunde <zhongyunde@huawei.com> | 2022-06-13 17:24:59 +0800 |
|---|---|---|
| committer | zhongyunde <zhongyunde@huawei.com> | 2022-06-13 17:33:50 +0800 |
| commit | c42a225545b4b494db7866d5db90255926059bc3 (patch) | |
| tree | 7e0b1a8d62210be79e94c437605baee22409eb3a /clang/lib/Frontend/CreateInvocationFromCommandLine.cpp | |
| parent | 6119053dab67129eb1700dbf36db3524dd3e421f (diff) | |
| download | llvm-c42a225545b4b494db7866d5db90255926059bc3.zip llvm-c42a225545b4b494db7866d5db90255926059bc3.tar.gz llvm-c42a225545b4b494db7866d5db90255926059bc3.tar.bz2 | |
[MachineScheduler] Order more stores by ascending address
According D125377, we order STP Q's by ascending address. While on some
targets, paired 128 bit loads and stores are slow, so the STP will split
into STRQ and STUR, so I hope these stores will also be ordered.
Also add subtarget feature ascend-store-address to control the aggressive order.
Reviewed By: dmgreen, fhahn
Differential Revision: https://reviews.llvm.org/D126700
Diffstat (limited to 'clang/lib/Frontend/CreateInvocationFromCommandLine.cpp')
0 files changed, 0 insertions, 0 deletions