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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-08-04 12:20:00 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-08-04 12:20:00 +0000 |
| commit | f0df221d761e34e5e8f0067d448c863e71619e08 (patch) | |
| tree | 93c7a64b2900d4a7c347ab66ba74824ee253a1b2 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | d587e20cec7a1894e5d8c1f516b3809a82b9681f (diff) | |
| download | llvm-f0df221d761e34e5e8f0067d448c863e71619e08.zip llvm-f0df221d761e34e5e8f0067d448c863e71619e08.tar.gz llvm-f0df221d761e34e5e8f0067d448c863e71619e08.tar.bz2 | |
[mips] Add assembler support for '.set mipsX'.
Summary:
This patch also fixes an issue with the way the Mips assembler enables/disables architecture
features. Before this patch, the assembler never disabled feature bits. For example,
.set mips64
.set mips32r2
would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right.
Unfortunately this isn't trivial to fix because there's not an easy way to clear
feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits
that imply the feature being cleared and not the implied bits by the feature (there's a
better explanation to the code I added).
Patch by Matheus Almeida and updated by Toma Tabacu
Reviewers: vmedic, matheusalmeida, dsanders
Reviewed By: dsanders
Subscribers: tomatabacu, llvm-commits
Differential Revision: http://reviews.llvm.org/D4123
llvm-svn: 214709
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions