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| author | James Molloy <james.molloy@arm.com> | 2014-08-02 14:51:24 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2014-08-02 14:51:24 +0000 |
| commit | ce45be04656bd33b6c35367677982293a06da7cc (patch) | |
| tree | 5bd05a4b002a1cf48d2eaec2ea546d0fa501a3c2 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 8c112d838c34cef46adcf97bc1538f6ec24eb0b3 (diff) | |
| download | llvm-ce45be04656bd33b6c35367677982293a06da7cc.zip llvm-ce45be04656bd33b6c35367677982293a06da7cc.tar.gz llvm-ce45be04656bd33b6c35367677982293a06da7cc.tar.bz2 | |
[AArch64] Teach DAGCombiner that converting two consecutive loads into a vector load is not a good transform when paired loads are available.
The combiner was creating Q-register loads and stores, which then had to be spilled because there are no callee-save Q registers!
llvm-svn: 214634
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions