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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-13 00:11:14 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-13 00:11:14 +0000 |
| commit | b366329a34a1f2dc277f030df239236d43792fba (patch) | |
| tree | 8124fc9ad778fa4853f226311cf9a73ff65c567c /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 5b2b38e053b4638c08da4104e8bb5bd643fde737 (diff) | |
| download | llvm-b366329a34a1f2dc277f030df239236d43792fba.zip llvm-b366329a34a1f2dc277f030df239236d43792fba.tar.gz llvm-b366329a34a1f2dc277f030df239236d43792fba.tar.bz2 | |
DAG/GlobalISel: Correct type profile of bitcount ops
The result integer does not need to be the same width as the input.
AMDGPU, NVPTX, and Hexagon all have patterns working around the types
matching. GlobalISel defines these as being different type indexes.
llvm-svn: 371797
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions