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| author | Congzhe Cao <congzhe.cao@@huawei.com> | 2020-09-30 13:03:14 -0400 |
|---|---|---|
| committer | Danilo C. Grael <dancgr@gmail.com> | 2020-09-30 13:06:51 -0400 |
| commit | 8d8cb1ad80b7074ac60d070fae89261894d34a0d (patch) | |
| tree | 4477f1b171e5a8d0557e1ddebd82406412ab2b50 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 73fb9698c0573778787e77a8ffa57e7fa3caebd4 (diff) | |
| download | llvm-8d8cb1ad80b7074ac60d070fae89261894d34a0d.zip llvm-8d8cb1ad80b7074ac60d070fae89261894d34a0d.tar.gz llvm-8d8cb1ad80b7074ac60d070fae89261894d34a0d.tar.bz2 | |
[AArch64] Avoid pairing loads when the base reg is modified
When pairing loads, we should check if in between the two loads the
base register has been modified. If that is the case then avoid pairing
them because the second load actually loads from a different address.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D86956
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions