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| author | David Sherwood <david.sherwood@arm.com> | 2021-02-22 16:00:38 +0000 |
|---|---|---|
| committer | David Sherwood <david.sherwood@arm.com> | 2021-02-25 10:31:26 +0000 |
| commit | 87dbcd88651a4e72fc8f5e1594f9b02232277301 (patch) | |
| tree | c9ae8f7664b2fe3b1afda3431b7049a4432ced1d /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 201ada80ee15aed23728500982857ad3769f6802 (diff) | |
| download | llvm-87dbcd88651a4e72fc8f5e1594f9b02232277301.zip llvm-87dbcd88651a4e72fc8f5e1594f9b02232277301.tar.gz llvm-87dbcd88651a4e72fc8f5e1594f9b02232277301.tar.bz2 | |
[CodeGen] Canonicalise adds/subs of i1 vectors using XOR
When calling SelectionDAG::getNode() to create an ADD or SUB
of two vectors with i1 element types we can canonicalise this
to use XOR instead, where 1+1 is treated as wrapping around
to 0 and 0-1 wraps to 1.
I've added the following tests for SVE targets:
CodeGen/AArch64/sve-pred-arith.ll
and modified some X86 tests to reflect the much simpler codegen
required.
Differential Revision: https://reviews.llvm.org/D97276
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions