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author | Tim Northover <tnorthover@apple.com> | 2013-09-13 07:26:52 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2013-09-13 07:26:52 +0000 |
commit | 635a979038f5d6411a70d94a7f176bffeec0633a (patch) | |
tree | 890b5cece0d2183017017b49f797c78a0fb22fa2 /clang/lib/Frontend/CompilerInvocation.cpp | |
parent | 4117bdbbbcfb798695f2c58dc180a84569d053fc (diff) | |
download | llvm-635a979038f5d6411a70d94a7f176bffeec0633a.zip llvm-635a979038f5d6411a70d94a7f176bffeec0633a.tar.gz llvm-635a979038f5d6411a70d94a7f176bffeec0633a.tar.bz2 |
AArch64: use RegisterOperand for NEON registers.
Previously we modelled VPR128 and VPR64 as essentially identical
register-classes containing V0-V31 (which had Q0-Q31 as "sub_alias"
sub-registers). This model is starting to cause significant problems
for code generation, particularly writing EXTRACT/INSERT_SUBREG
patterns for converting between the two.
The change here switches to classifying VPR64 & VPR128 as
RegisterOperands, which are essentially aliases for RegisterClasses
with different parsing and printing behaviour. This fits almost
exactly with their real status (VPR128 == FPR128 printed strangely,
VPR64 == FPR64 printed strangely).
llvm-svn: 190665
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions