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authorFangrui Song <maskray@google.com>2020-06-11 09:05:59 -0700
committerFangrui Song <maskray@google.com>2020-06-11 09:10:50 -0700
commit5ee571735ddf1f81db3df5d7328c86432209e3b4 (patch)
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parentfac7259c81671c37140374f3e6ec1fc7472c677c (diff)
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[llvm-objdump] Decrease instruction indentation for non-x86
Place the instruction at the 24th column (0-based indexing), matching GNU objdump ARM/AArch64/powerpc/etc when the address is low. This is beneficial for non-x86 targets which have short instruction lengths. ``` // GNU objdump AArch64 0: 91001062 add x2, x3, #0x4 400078: 91001062 add x2, x3, #0x4 // llvm-objdump, with this patch 0: 62 10 00 91 add x2, x3, #4 400078: 62 10 00 91 add x2, x3, #4 // llvm-objdump, if we change to print a word instead of bytes in the future 0: 91001062 add x2, x3, #4 400078: 91001062 add x2, x3, #4 // GNU objdump Thumb 0: bf00 nop // GNU objdump Power ISA 3.1 64-bit instruction // 0: 00 00 10 04 plwa r3,0 // 4: 00 00 60 a4 ``` Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D81590
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