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| author | Craig Topper <craig.topper@intel.com> | 2018-02-12 01:33:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-02-12 01:33:38 +0000 |
| commit | 3ce035acf313f00c9814461e07cc3630e88a1f89 (patch) | |
| tree | d530acf1eacdb3a077b4e0174010563b8c39f585 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | dfc322ddf4542d34d3fffb5f5813c1a94bd3717f (diff) | |
| download | llvm-3ce035acf313f00c9814461e07cc3630e88a1f89.zip llvm-3ce035acf313f00c9814461e07cc3630e88a1f89.tar.gz llvm-3ce035acf313f00c9814461e07cc3630e88a1f89.tar.bz2 | |
[X86] Add KADD X86ISD opcode instead of reusing ISD::ADD.
ISD::ADD implies individual vector element addition with no carries between elements. But for a vXi1 type that would be the same as XOR. And we already turn ISD::ADD into ISD::XOR for all vXi1 types during lowering. So the ISD::ADD pattern would never be able to match anyway.
KADD is different, it adds the elements but also propagates a carry between them. This just a way of doing an add in k-register without bitcasting to the scalar domain. There's still no way to match the pattern, but at least its not obviously wrong.
llvm-svn: 324861
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions