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| author | Tim Northover <tnorthover@apple.com> | 2014-05-08 10:30:56 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-08 10:30:56 +0000 |
| commit | 18f8bb84faa1d6cb44e1ca29e783dfd309f109df (patch) | |
| tree | 3c1bbeb6e190eb7a7136e246dd1bb63f82ca3bf4 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 9661ec0ec398a3526ce95e94b98e2adb49e68f8b (diff) | |
| download | llvm-18f8bb84faa1d6cb44e1ca29e783dfd309f109df.zip llvm-18f8bb84faa1d6cb44e1ca29e783dfd309f109df.tar.gz llvm-18f8bb84faa1d6cb44e1ca29e783dfd309f109df.tar.bz2 | |
ARM64: make sure FastISel emits SSA MachineInstrs
We need to use a temporary register for a 2-step operation like REM.
llvm-svn: 208297
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions