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| author | Matt Devereau <matthew.devereau@arm.com> | 2023-08-09 12:41:49 +0000 |
|---|---|---|
| committer | Matt Devereau <matthew.devereau@arm.com> | 2023-08-09 12:49:42 +0000 |
| commit | 175850f98726b543f9a1f5309d5fded481e60efa (patch) | |
| tree | 874c86d994563631bfb63fec48738fafd7bde418 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | cc488b80ad2aa037a379ed801aa11bc46707f94f (diff) | |
| download | llvm-175850f98726b543f9a1f5309d5fded481e60efa.zip llvm-175850f98726b543f9a1f5309d5fded481e60efa.tar.gz llvm-175850f98726b543f9a1f5309d5fded481e60efa.tar.bz2 | |
[AArch64][SVE2] Combine trunc+add+lsr to rshrnb
The example sequence
add z0.h, z0.h, #32
lsr z0.h, #6
st1b z0.h, x1
can be replaced with
rshrnb z0.b, #6
st1b z0.h, x1
As the top half of the destination elements are truncated.
In similar fashion,
add z0.s, z0.s, #32
lsr z1.s, z1.s, #6
add z1.s, z1.s, #32
lsr z0.s, z0.s, #6
uzp1 z0.h, z0.h, z1.h
Can be replaced with
rshrnb z1.h, z1.s, #6
rshrnb z0.h, z0.s, #6
uzp1 z0.h, z0.h, z1.h
Differential Revision: https://reviews.llvm.org/D155299
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions