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| author | Craig Topper <craig.topper@sifive.com> | 2022-10-31 10:04:36 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-10-31 10:31:45 -0700 |
| commit | 06f640d3fb060e2e9cfed1d7c44636c7ffe3308b (patch) | |
| tree | d81e3708a009290ce2a516453746c13cf5009c67 /clang/lib/Frontend/ASTMerge.cpp | |
| parent | cc2e8e5075615ccad7d050a52937acec8c9ef93a (diff) | |
| download | llvm-06f640d3fb060e2e9cfed1d7c44636c7ffe3308b.zip llvm-06f640d3fb060e2e9cfed1d7c44636c7ffe3308b.tar.gz llvm-06f640d3fb060e2e9cfed1d7c44636c7ffe3308b.tar.bz2 | |
[X86] Enable EVEX GFNI instructions without avx512bw.
We only really need avx512bw for masking 256 or 512 bit GFNI
instructions due to the need for v32i1 or v64i1.
I wanted to enable 128-bit intrinsics with avx512vl, but the
__builtin_ia32_selectb_128 used in the header file requires avx512bw.
The codegen test for the same is also not using a masked instruction
because vselect with v16i1 mask and v16i8 is not legal so is expanded
before isel. To fix these issues we need a mask specific builtin and a
mask specific ISD opcode.
Fixes PR58687.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D137036
Diffstat (limited to 'clang/lib/Frontend/ASTMerge.cpp')
0 files changed, 0 insertions, 0 deletions