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| author | modiking <mmo@nvidia.com> | 2025-04-22 16:50:45 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-22 16:50:45 -0700 |
| commit | 3d04da5bc022269b3238b2a84347dce7a7afd51b (patch) | |
| tree | 001015cd9ee3c7385252cb314c849f318e665819 /clang/lib/Format/FormatTokenLexer.cpp | |
| parent | 8c74dc1adf83d370e740e44ffe073487fd3b38d2 (diff) | |
| download | llvm-3d04da5bc022269b3238b2a84347dce7a7afd51b.zip llvm-3d04da5bc022269b3238b2a84347dce7a7afd51b.tar.gz llvm-3d04da5bc022269b3238b2a84347dce7a7afd51b.tar.bz2 | |
[NVPTX] Add support for Shared Cluster Memory address space [2/2] (#136768)
Adds support for new Shared Cluster Memory Address Space
(SHARED_CLUSTER, addrspace 7). See
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#distributed-shared-memory
for details.
Follow-up to https://github.com/llvm/llvm-project/pull/135444
1. Update existing codegen/intrinsics in LLVM and MLIR that now use this
address space
2. Auto-upgrade previous intrinsics that used SMEM (addrspace 3) but
were really taking in a shared cluster pointer to the new address space
Diffstat (limited to 'clang/lib/Format/FormatTokenLexer.cpp')
0 files changed, 0 insertions, 0 deletions