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author | Erich Keane <erich.keane@intel.com> | 2018-02-02 15:53:35 +0000 |
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committer | Erich Keane <erich.keane@intel.com> | 2018-02-02 15:53:35 +0000 |
commit | 24e6840b9e3c1f3d28fb4a5202890fae97feaf77 (patch) | |
tree | 5838957797edf8d1c5088aeda77673208cb4037f /clang/lib/CodeGen/TargetInfo.cpp | |
parent | b4ab4b631717779e7fc4787b7cbf36b76b32e346 (diff) | |
download | llvm-24e6840b9e3c1f3d28fb4a5202890fae97feaf77.zip llvm-24e6840b9e3c1f3d28fb4a5202890fae97feaf77.tar.gz llvm-24e6840b9e3c1f3d28fb4a5202890fae97feaf77.tar.bz2 |
[CodeGen][va_args] Correct Vector Struct va-arg 'in_reg' code gen
When trying to track down a different bug, we discovered
that calling __builtin_va_arg on a vec3f type caused
the SROA pass to issue a warning that there was an illegal
access.
Further research showed that the vec3f type is
alloca'ed as size '12', but the _builtin_va_arg code
on x86_64 was always loading this out of registers as
{double, double}. Thus, the 2nd store into the vec3f
was storing in bytes 12-15!
This patch alters the original implementation which always
assumed {double, double} to use the actual coerced type
instead, so the LLVM-IR generated is a load/GEP/store of
a <2 x float> and a float, rather than a double and a double.
Tests were added for all combinations I could think of that
would fit in 2 FP registers, and all work exactly as expected.
Differential Revision: https://reviews.llvm.org/D42811
llvm-svn: 324098
Diffstat (limited to 'clang/lib/CodeGen/TargetInfo.cpp')
-rw-r--r-- | clang/lib/CodeGen/TargetInfo.cpp | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index 8641d87..f523096 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -3790,17 +3790,18 @@ Address X86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, Address RegAddrHi = CGF.Builder.CreateConstInBoundsByteGEP(RegAddrLo, CharUnits::fromQuantity(16)); - llvm::Type *DoubleTy = CGF.DoubleTy; - llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy); + llvm::Type *ST = AI.canHaveCoerceToType() + ? AI.getCoerceToType() + : llvm::StructType::get(CGF.DoubleTy, CGF.DoubleTy); llvm::Value *V; Address Tmp = CGF.CreateMemTemp(Ty); Tmp = CGF.Builder.CreateElementBitCast(Tmp, ST); - V = CGF.Builder.CreateLoad( - CGF.Builder.CreateElementBitCast(RegAddrLo, DoubleTy)); + V = CGF.Builder.CreateLoad(CGF.Builder.CreateElementBitCast( + RegAddrLo, ST->getStructElementType(0))); CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0, CharUnits::Zero())); - V = CGF.Builder.CreateLoad( - CGF.Builder.CreateElementBitCast(RegAddrHi, DoubleTy)); + V = CGF.Builder.CreateLoad(CGF.Builder.CreateElementBitCast( + RegAddrHi, ST->getStructElementType(1))); CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1, CharUnits::fromQuantity(8))); |