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| author | Yaxun (Sam) Liu <yaxun.liu@amd.com> | 2020-03-12 12:49:26 -0400 |
|---|---|---|
| committer | Yaxun (Sam) Liu <yaxun.liu@amd.com> | 2020-03-13 06:56:56 -0400 |
| commit | 0ffb12ca67fd813a8ae840399626dd5f8fea3178 (patch) | |
| tree | 27ef5c828e37158730f5ea5353c5a7f256fbb0a5 /clang/lib/CodeGen/TargetInfo.cpp | |
| parent | 2e77f0cf76be7c4b78784d6bb098e0c23d670ab0 (diff) | |
| download | llvm-0ffb12ca67fd813a8ae840399626dd5f8fea3178.zip llvm-0ffb12ca67fd813a8ae840399626dd5f8fea3178.tar.gz llvm-0ffb12ca67fd813a8ae840399626dd5f8fea3178.tar.bz2 | |
[HIP] Mark kernels with uniform-work-group-size=true
Differential Revision: https://reviews.llvm.org/D76076
Diffstat (limited to 'clang/lib/CodeGen/TargetInfo.cpp')
| -rw-r--r-- | clang/lib/CodeGen/TargetInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index 21d5cd0..fb472d5 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -8091,6 +8091,10 @@ void AMDGPUTargetCodeGenInfo::setTargetAttributes( (M.getTriple().getOS() == llvm::Triple::AMDHSA)) F->addFnAttr("amdgpu-implicitarg-num-bytes", "56"); + if (IsHIPKernel) + F->addFnAttr("uniform-work-group-size", "true"); + + const auto *FlatWGS = FD->getAttr<AMDGPUFlatWorkGroupSizeAttr>(); if (ReqdWGS || FlatWGS) { unsigned Min = 0; |