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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-09-24 07:55:20 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-09-24 07:55:20 +0000 |
| commit | c017656202f1d48f9bca3f696466da189eb36be6 (patch) | |
| tree | 6d27755246c120bced838a9a6ad26ff49e51d605 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 4c99f5fe2b5ca6a880e6a6d3858893f88b6eefe5 (diff) | |
| download | llvm-c017656202f1d48f9bca3f696466da189eb36be6.zip llvm-c017656202f1d48f9bca3f696466da189eb36be6.tar.gz llvm-c017656202f1d48f9bca3f696466da189eb36be6.tar.bz2 | |
[ARM][AArch64] Add feature +fp16fml
Armv8.4-A adds a few FP16 instructions that can optionally be implemented
in CPUs of Armv8.2-A and above.
This patch adds a feature to clang to permit selection of these
instructions. This interacts with the +fp16 option as follows:
Prior to Armv8.4-A:
*) +fp16fml implies +fp16
*) +nofp16 implies +nofp16fml
From Armv8.4-A:
*) The above conditions apply, additionally: +fp16 implies +fp16fml
Patch by Bernard Ogden.
Differential Revision: https://reviews.llvm.org/D50229
llvm-svn: 342862
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions