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authorLuke Cheeseman <luke.cheeseman@arm.com>2018-09-24 10:42:22 +0000
committerLuke Cheeseman <luke.cheeseman@arm.com>2018-09-24 10:42:22 +0000
commitbda54bca391de6b83a2131bf6344d3a2ae8eca34 (patch)
tree9428d980c44f9214a6fa526bf2910b72f1180a5b /clang/lib/CodeGen/CodeGenModule.cpp
parentc451c9ef50b7b3df260e709a9dcd6324356d57a2 (diff)
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[ARM][ARMLoadStoreOptimizer]
- The load store optimizer is currently merging multiple loads/stores into VLDM/VSTM with more than 16 doubleword registers - This is an UNPREDICTABLE instruction and shouldn't be done - It looks like the Limit for how many registers included in a merge got dropped at some point so I am reintroducing it in this patch - This fixes https://bugs.llvm.org/show_bug.cgi?id=38389 Differential Revision: https://reviews.llvm.org/D52085 llvm-svn: 342872
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