diff options
| author | Renato Golin <renato.golin@linaro.org> | 2014-08-04 23:21:56 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2014-08-04 23:21:56 +0000 |
| commit | bc0b0378c5832988c7447fb088d228d3ea6cbb59 (patch) | |
| tree | 2133bc0b04dd46a5d279c0608fc933f7de8002cb /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | ccbe0a802217d0a422177ebc4649cfab465426c0 (diff) | |
| download | llvm-bc0b0378c5832988c7447fb088d228d3ea6cbb59.zip llvm-bc0b0378c5832988c7447fb088d228d3ea6cbb59.tar.gz llvm-bc0b0378c5832988c7447fb088d228d3ea6cbb59.tar.bz2 | |
Allow CP10/CP11 operations on ARMv5/v6
Those registers are VFP/NEON and vector instructions should be used instead,
but old cores rely on those co-processors to enable VFP unwinding. This change
was prompted by the libc++abi's unwinding routine and is also present in many
legacy low-level bare-metal code that we ought to compile/assemble.
Fixing bug PR20025 and allowing PR20529 to proceed with a fix in libc++abi.
llvm-svn: 214802
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions