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| author | Oliver Stannard <oliver.stannard@arm.com> | 2024-11-19 11:23:14 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-19 10:23:14 +0000 |
| commit | b2ec416aa5bcd89c4bc295163d60e5a2ecb99212 (patch) | |
| tree | 824f2ae95f5aaf764401ec733261ac3c56db4ec1 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | b3e2b1a7eb258a7c9c55691d08342eface083499 (diff) | |
| download | llvm-b2ec416aa5bcd89c4bc295163d60e5a2ecb99212.zip llvm-b2ec416aa5bcd89c4bc295163d60e5a2ecb99212.tar.gz llvm-b2ec416aa5bcd89c4bc295163d60e5a2ecb99212.tar.bz2 | |
[ARM] Fix NaN behaviour for MVE compare intrinsics (#116371)
The MVE intrinsics are defined as having the same behaviour as the
instructions which they correspond to. In particular, the vcmpleq and
vcmpltq intrinsics correspond to the VCMP instruction with the LE or LT
condition. However, these instructions with these two conditions do not
match the normal IEEE754 behaviour for NaNs, they return true if either
operand is a NaN, instead of false. Therefore we need to generate `fcmp`
IR instructions with the `ule` and `ult` conditions, instead of `ole`
and `olt`.
This differs from AdvSIMD, where only instructions with the EQ, GE and
GT conditions are available, and the intrinsics for the others are
defined by swapping the condition and operand order, so the results
match the IEEE754 behaviour for NaNs.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions