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| author | Craig Topper <craig.topper@sifive.com> | 2024-09-10 11:44:04 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-09-10 11:44:04 -0700 |
| commit | 5537ae87b3a87b3abeb4e6983cecd9b103648243 (patch) | |
| tree | 01beea0148feed4662069da37544336724de11a0 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | feeb6aa3039872a2202e6813c81235b7d7455942 (diff) | |
| download | llvm-5537ae87b3a87b3abeb4e6983cecd9b103648243.zip llvm-5537ae87b3a87b3abeb4e6983cecd9b103648243.tar.gz llvm-5537ae87b3a87b3abeb4e6983cecd9b103648243.tar.bz2 | |
[RISCV] Fix fneg.d/fabs.d aliasing handling for Zdinx. Add missing fmv.s/d aliases.
We were missing test coverage for fneg.d/fabs.d for Zdinx. When I
added it revealed it only worked on RV64. The assembler was not
creating a GPRPair register class on RV32 so the alias couldn't match.
The disassembler was also not using GPRPair registers preventing the
aliases from printing in disassembly too.
I've fixed the assembler by adding new parsing methods in an attempt
to get decent diagnostics. This is hard since the mnemonics are
ambiguous between D and Zdinx. Tests have been adjusted for some
differences in what errors are reported first.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions