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| author | Michael Liao <michael.liao@intel.com> | 2013-01-22 21:47:38 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-01-22 21:47:38 +0000 |
| commit | 3dffc5e2b73a67dc6ca4feb686fb618c749b002c (patch) | |
| tree | 3be0e6bb3fcd422c7cbcb9123b842b59a2a12277 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 81c944cadb7f9e55b3517b7423a820e2577b9279 (diff) | |
| download | llvm-3dffc5e2b73a67dc6ca4feb686fb618c749b002c.zip llvm-3dffc5e2b73a67dc6ca4feb686fb618c749b002c.tar.gz llvm-3dffc5e2b73a67dc6ca4feb686fb618c749b002c.tar.bz2 | |
Fix an issue of pseudo atomic instruction DAG schedule
- Add list of physical registers clobbered in pseudo atomic insts
Physical registers are clobbered when pseudo atomic instructions are
expanded. Add them in clobber list to prevent DAG scheduler to
mis-schedule them after these insns are declared side-effect free.
- Add test case from Michael Kuperstein <michael.m.kuperstein@intel.com>
llvm-svn: 173200
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions