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| author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2025-04-17 09:25:57 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-17 09:25:57 +0100 |
| commit | 1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9 (patch) | |
| tree | e5c2cbef7583597a946ee4f8dab1e01c0e1f349d /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | bf6986f9f09f79da38006a83c339226c429bb686 (diff) | |
| download | llvm-1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9.zip llvm-1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9.tar.gz llvm-1588aab6ed2d02db2ffb23ca7f339d38a4d8c5e9.tar.bz2 | |
[AArch64] Generalize integer FPR lane stores for all types (#134117)
This rewrites the fold from #129756 to apply to all types, including
stores of i8s. This required adding a new `aarch64mfp8` MVT to represent
FPR8 types on AArch64, which can be used to extract and store 8-bit
values using b sub-registers.
Follow on from: #129756
Closes: #131793
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions