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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-06-23 09:22:11 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-06-23 09:22:11 +0000 |
| commit | 081e4bb14c01e4af6740470487a3c99235cf68c8 (patch) | |
| tree | 9cd4f6e05d27587c413bb918a017feb321550a87 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | e440f99913f9e3cb02331f95808cfe57f0b7836e (diff) | |
| download | llvm-081e4bb14c01e4af6740470487a3c99235cf68c8.zip llvm-081e4bb14c01e4af6740470487a3c99235cf68c8.tar.gz llvm-081e4bb14c01e4af6740470487a3c99235cf68c8.tar.bz2 | |
[misched] Extend scheduler to handle unsupported features
Currently isComplete = 1 requires that every instruction must
be described, declared unsupported or marked as having no
scheduling information for a processor.
For some backends such as MIPS, this requirement entails
long regex lists of instructions that are unsupported.
This patch teaches Tablegen to skip over instructions that
are associated with unsupported feature when checking if the
scheduling model is complete.
Patch by: Daniel Sanders
Contributions by: Simon Dardis
Reviewers: MatzeB
Differential Reviewer: http://reviews.llvm.org/D20522
llvm-svn: 273551
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions