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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-08-03 22:44:51 -0400 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2022-08-04 19:02:56 -0400 |
| commit | c5b36ab1d6a667554bf369c34e51d02add039d16 (patch) | |
| tree | a9f1e7adc2523e4f821012bdb51d4e4364415a70 /clang/lib/CodeGen/CodeGenFunction.h | |
| parent | 33171df9cc7f6560dea7b0b162ab51ff97417468 (diff) | |
| download | llvm-c5b36ab1d6a667554bf369c34e51d02add039d16.zip llvm-c5b36ab1d6a667554bf369c34e51d02add039d16.tar.gz llvm-c5b36ab1d6a667554bf369c34e51d02add039d16.tar.bz2 | |
AMDGPU/clang: Remove dead code
The order has to be a constant and should be enforced by the builtin
definition. The fallthrough behavior would have been broken anyway.
There's still an existing issue/assert if you try to use garbage for the
ordering. The IRGen should be broken, but we also hit another assert
before that.
Fixes issue 56832
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.h')
| -rw-r--r-- | clang/lib/CodeGen/CodeGenFunction.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/clang/lib/CodeGen/CodeGenFunction.h b/clang/lib/CodeGen/CodeGenFunction.h index 30cf162..93d4263 100644 --- a/clang/lib/CodeGen/CodeGenFunction.h +++ b/clang/lib/CodeGen/CodeGenFunction.h @@ -4248,7 +4248,7 @@ public: llvm::Value *EmitHexagonBuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitRISCVBuiltinExpr(unsigned BuiltinID, const CallExpr *E, ReturnValueSlot ReturnValue); - bool ProcessOrderScopeAMDGCN(llvm::Value *Order, llvm::Value *Scope, + void ProcessOrderScopeAMDGCN(llvm::Value *Order, llvm::Value *Scope, llvm::AtomicOrdering &AO, llvm::SyncScope::ID &SSID); |