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| author | Hsiangkai Wang <kai.wang@sifive.com> | 2021-02-04 12:57:44 +0800 |
|---|---|---|
| committer | Hsiangkai Wang <kai.wang@sifive.com> | 2021-02-24 07:57:31 +0800 |
| commit | 1a35a1b0748639a0014eb8aec1a9c36e330c5316 (patch) | |
| tree | 21d9c414b5232ba92b92c6ee47071b44dc961909 /clang/lib/CodeGen/CodeGenFunction.h | |
| parent | dbb131d53aacabdf5d85299e447a970a0280b127 (diff) | |
| download | llvm-1a35a1b0748639a0014eb8aec1a9c36e330c5316.zip llvm-1a35a1b0748639a0014eb8aec1a9c36e330c5316.tar.gz llvm-1a35a1b0748639a0014eb8aec1a9c36e330c5316.tar.bz2 | |
[RISCV] Add vadd with mask and without mask builtin.
Demonstrate how to add RISC-V V builtins and lower them to IR intrinsics for V extension.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93446
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.h')
| -rw-r--r-- | clang/lib/CodeGen/CodeGenFunction.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/clang/lib/CodeGen/CodeGenFunction.h b/clang/lib/CodeGen/CodeGenFunction.h index 524c9c5..8ef0de0 100644 --- a/clang/lib/CodeGen/CodeGenFunction.h +++ b/clang/lib/CodeGen/CodeGenFunction.h @@ -4129,6 +4129,8 @@ public: llvm::Value *EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, const CallExpr *E); llvm::Value *EmitHexagonBuiltinExpr(unsigned BuiltinID, const CallExpr *E); + llvm::Value *EmitRISCVBuiltinExpr(unsigned BuiltinID, const CallExpr *E, + ReturnValueSlot ReturnValue); bool ProcessOrderScopeAMDGCN(llvm::Value *Order, llvm::Value *Scope, llvm::AtomicOrdering &AO, llvm::SyncScope::ID &SSID); |