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| author | Vikash Gupta <Vikash.Gupta@amd.com> | 2025-01-06 17:42:38 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-06 17:42:38 +0530 |
| commit | fd6f8b3ce33cc2cbe378f8f1b391f3f40fa7bd54 (patch) | |
| tree | 51cf3ac672fc7108a42af5452770b35b19395d0a /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | 9ce8f4b70b31b031ac9b4818a268bfc8c67a7a8e (diff) | |
| download | llvm-fd6f8b3ce33cc2cbe378f8f1b391f3f40fa7bd54.zip llvm-fd6f8b3ce33cc2cbe378f8f1b391f3f40fa7bd54.tar.gz llvm-fd6f8b3ce33cc2cbe378f8f1b391f3f40fa7bd54.tar.bz2 | |
[AMDGPU] [GlobalIsel] Combine Fmul with Select into ldexp instruction. (#120104)
This combine pattern perform the below transformation.
fmul x, select(y, A, B) -> fldexp (x, select i32 (y, a, b))
fmul x, select(y, -A, -B) -> fldexp ((fneg x), select i32 (y, a, b))
where, A=2^a & B=2^b ; a and b are integers.
It is a follow-up PR to implement the above combine for globalIsel, as
the corresponding DAG combine has been done for SelectionDAG Isel
(#111109)
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
0 files changed, 0 insertions, 0 deletions