diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-02-06 16:11:45 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-02-12 16:19:45 -0800 |
| commit | e174c278ca2f91bd2cae4fc849ba888fa7f851a9 (patch) | |
| tree | 5925e8b15403d7809076e4e32431eec37d62a3f8 /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | de716173357f5715fe14788ec022e6eeb2b33540 (diff) | |
| download | llvm-e174c278ca2f91bd2cae4fc849ba888fa7f851a9.zip llvm-e174c278ca2f91bd2cae4fc849ba888fa7f851a9.tar.gz llvm-e174c278ca2f91bd2cae4fc849ba888fa7f851a9.tar.bz2 | |
AMDGPU/GlobalISel: Fix mapping G_ICMP with constrained result
When SI_IF is inserted, it constrains the source register with a
register class, which was quite likely a G_ICMP. This was incorrectly
treating it as a scalar, and then applyMappingImpl would end up
producing invalid MIR since this was unexpected.
Also fix not using all VGPR sources for vcc outputs.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
0 files changed, 0 insertions, 0 deletions