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author | Nikita Popov <npopov@redhat.com> | 2022-07-25 15:12:10 +0200 |
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committer | Nikita Popov <npopov@redhat.com> | 2022-07-27 10:00:31 +0200 |
commit | b1b1086973d5be26f127540852ace59c5119e90a (patch) | |
tree | cfae61cf6026654c6f38fac4916d61c7fa17185c /clang/lib/CodeGen/CodeGenFunction.cpp | |
parent | 9cc1dd209d20eda51710f302800899730b419381 (diff) | |
download | llvm-b1b1086973d5be26f127540852ace59c5119e90a.zip llvm-b1b1086973d5be26f127540852ace59c5119e90a.tar.gz llvm-b1b1086973d5be26f127540852ace59c5119e90a.tar.bz2 |
[ARM] Add target feature to force 32-bit atomics
This adds a +atomic-32 target feature, which instructs LLVM to assume
that lock-free 32-bit atomics are available for this target, even
if they usually wouldn't be.
If only atomic loads/stores are used, then this won't emit libcalls.
If atomic CAS is used, then the user is responsible for providing
any necessary __sync implementations (e.g. by masking interrupts
for single-core privileged use cases).
See https://reviews.llvm.org/D120026#3674333 for context on this
change. The tl;dr is that the thumbv6m target in Rust has
historically made atomic load/store only available, which is
incompatible with the change from D120026, which switched these to
use libatomic.
Differential Revision: https://reviews.llvm.org/D130480
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
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