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| author | Austin Kerbow <Austin.Kerbow@amd.com> | 2020-07-13 15:38:29 -0700 |
|---|---|---|
| committer | Austin Kerbow <Austin.Kerbow@amd.com> | 2020-07-28 11:53:02 -0700 |
| commit | adeeac9d5a322a751011d4624152317cb43419d9 (patch) | |
| tree | 6466b96443cef292f2d474035fe82a80a5906393 /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | 834133c950fce120d0378d09718d32a320cbcd72 (diff) | |
| download | llvm-adeeac9d5a322a751011d4624152317cb43419d9.zip llvm-adeeac9d5a322a751011d4624152317cb43419d9.tar.gz llvm-adeeac9d5a322a751011d4624152317cb43419d9.tar.bz2 | |
[AMDGPU] Spill CSR VGPR which is reserved for SGPR spills
Update logic for reserving VGPR for SGPR spills. A CSR VGPR being reserved for
SGPR spills could be clobbered if there were no free lower VGPR's available.
Create a stack object so that it will be spilled in the prologue. Also
adds more tests.
Differential Revision: https://reviews.llvm.org/D83730
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
0 files changed, 0 insertions, 0 deletions