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| author | Erik Enikeev <47039011+Varnike@users.noreply.github.com> | 2025-10-08 00:19:53 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-07 22:19:53 +0100 |
| commit | 5c613f287df7fc94e159621f870f1bb1fe3baaee (patch) | |
| tree | 0050413d7b11c7ffcee765364bba0ceeb9f403ff /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | 57f69232da622569d3a06ecb717fbf713aa8d457 (diff) | |
| download | llvm-5c613f287df7fc94e159621f870f1bb1fe3baaee.zip llvm-5c613f287df7fc94e159621f870f1bb1fe3baaee.tar.gz llvm-5c613f287df7fc94e159621f870f1bb1fe3baaee.tar.bz2 | |
[ARM] Add mayRaiseFPException to appropriate instructions and mark all instructions that read/write fpscr rounding bits as doing so (#160698)
Added new register FPSCR_RM to correctly model interactions with
rounding mode control bits of fpscr and to avoid performance regressions
in normal non-strictfp case
This PR is part of the work on adding strict FP support in ARM, which
was previously discussed in #137101.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
0 files changed, 0 insertions, 0 deletions