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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-05-03 11:11:29 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-03 11:11:29 -0400 |
| commit | 56b8bd77445f2f7cc15c294c9089b73ca8f9ecdd (patch) | |
| tree | b06d0732eb2f4b846ea3a49ade5a8e9e4ccc689b /clang/lib/CodeGen/CodeGenFunction.cpp | |
| parent | bab10981f3c7a15231b8e2008f99a38a5582e3b0 (diff) | |
| download | llvm-56b8bd77445f2f7cc15c294c9089b73ca8f9ecdd.zip llvm-56b8bd77445f2f7cc15c294c9089b73ca8f9ecdd.tar.gz llvm-56b8bd77445f2f7cc15c294c9089b73ca8f9ecdd.tar.bz2 | |
[RISCV] Add Sched classes for vector crypto instructions (#90068)
The vector crypto instructions may have different scheduling behavior
compared to VALU operations. Instead of using scheduling resources that
describe VALU operations, we give these instructions their own
scheduling resources. This is similar to what we did for Zb* instructions.
The sifive-p670 has vector crypto, so we model behavior for these instructions
in the P600SchedModel. The numbers are based off of measurements collected
internally. These numbers are a bit old and new measurements show that they may
not be fully accurate. It is likely that we will refine these numbers in a
follow up patch(s) based on new measurements.
This PR is stacked on #89256.
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.cpp')
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