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authorArchibald Elliott <archibald.elliott@arm.com>2022-12-07 10:04:30 +0000
committerArchibald Elliott <archibald.elliott@arm.com>2022-12-16 14:42:27 +0000
commit82b51a14280414a53413ed62c001d2c589c649c3 (patch)
tree4f0a241f025d80eff06abdbb261267cf7dc19b10 /clang/lib/CodeGen/CGBuiltin.cpp
parentf86cdb4853618603b8889dfeb932fd4ef8efd010 (diff)
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[AArch64] Support SLC in ACLE prefetch intrinsics
This change: - Modifies the ACLE code to allow the new SLC value (3) for the prefetch target. - Introduces a new intrinsic, @llvm.aarch64.prefetch which matches the PRFM family instructions much more closely, and can represent all values for the PRFM immediate. The target-independent @llvm.prefetch intrinsic does not have enough information for us to be able to lower to it from the ACLE intrinsics correctly. - Lowers the acle calls to the new intrinsic on aarch64 (the ARM lowering is unchanged). - Implements code generation for the new intrinsic in both SelectionDAG and GlobalISel. We specifically choose to continue to support lowering the target-independent @llvm.prefetch intrinsic so that other frontends can continue to use it. Differential Revision: https://reviews.llvm.org/D139443
Diffstat (limited to 'clang/lib/CodeGen/CGBuiltin.cpp')
-rw-r--r--clang/lib/CodeGen/CGBuiltin.cpp23
1 files changed, 0 insertions, 23 deletions
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bd96108..55aa9f6 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -9749,29 +9749,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
}
- if (BuiltinID == clang::AArch64::BI__builtin_arm_prefetch) {
- Value *Address = EmitScalarExpr(E->getArg(0));
- Value *RW = EmitScalarExpr(E->getArg(1));
- Value *CacheLevel = EmitScalarExpr(E->getArg(2));
- Value *RetentionPolicy = EmitScalarExpr(E->getArg(3));
- Value *IsData = EmitScalarExpr(E->getArg(4));
-
- Value *Locality = nullptr;
- if (cast<llvm::ConstantInt>(RetentionPolicy)->isZero()) {
- // Temporal fetch, needs to convert cache level to locality.
- Locality = llvm::ConstantInt::get(Int32Ty,
- -cast<llvm::ConstantInt>(CacheLevel)->getValue() + 3);
- } else {
- // Streaming fetch.
- Locality = llvm::ConstantInt::get(Int32Ty, 0);
- }
-
- // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify
- // PLDL3STRM or PLDL2STRM.
- Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType());
- return Builder.CreateCall(F, {Address, RW, Locality, IsData});
- }
-
if (BuiltinID == clang::AArch64::BI__builtin_arm_rbit) {
assert((getContext().getTypeSize(E->getType()) == 32) &&
"rbit of unusual size!");