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| author | Craig Topper <craig.topper@sifive.com> | 2024-08-29 15:00:23 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-29 15:00:23 -0700 |
| commit | aa91d90cb07d72b32176a966fe798ab71ecb0a76 (patch) | |
| tree | 07ae335def9dc821da059a2ca9db09fb08fb4514 /clang/lib/CodeGen/BackendUtil.cpp | |
| parent | 4caf0196c042601b1c442a5726a157fead00ecc7 (diff) | |
| download | llvm-aa91d90cb07d72b32176a966fe798ab71ecb0a76.zip llvm-aa91d90cb07d72b32176a966fe798ab71ecb0a76.tar.gz llvm-aa91d90cb07d72b32176a966fe798ab71ecb0a76.tar.bz2 | |
[LegalizeVectorOps][PowerPC] Use xor to expand fneg. (#106595)
This preserves the semantis of fneg and matches what we do in
LegalizeDAG.
I kept the legal FSUB check to force unrolling for some targets that
don't have FSUB but have XOR. On Aarch64, using xor broke some tests that
expected to see a (v1f64 (fma (insertvector_elt (f64 (fneg
(extractvectorelt X)))))) pattern.
Diffstat (limited to 'clang/lib/CodeGen/BackendUtil.cpp')
0 files changed, 0 insertions, 0 deletions