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author	Simon Pilgrim <llvm-dev@redking.me.uk>	2020-05-14 13:35:08 +0100
committer	Simon Pilgrim <llvm-dev@redking.me.uk>	2020-05-14 18:13:58 +0100
commit	acb6f1ae096e8262fb30a267e9f40dea62432b26 (patch)
tree	53675c2d34b7a43313088eeb329124ec2235303b /clang/lib/Basic/SourceManager.cpp
parent	10b49315faa6338eaf52bb782e7c53644ad17dab (diff)
download	llvm-acb6f1ae096e8262fb30a267e9f40dea62432b26.zip llvm-acb6f1ae096e8262fb30a267e9f40dea62432b26.tar.gz llvm-acb6f1ae096e8262fb30a267e9f40dea62432b26.tar.bz2

TargetLowering.cpp - remove non-constant EXTRACT_SUBVECTOR/INSERT_SUBVECTOR handling. NFC.

Now that D79814 has landed, we can assume that subvector ops use constant, in-range indices.

Diffstat (limited to 'clang/lib/Basic/SourceManager.cpp')

0 files changed, 0 insertions, 0 deletions

> if (tdep->ppc_vr0_regnum != -1) { int ret = 0; __vmx_context_t vmx; if (data->arch64) ret = ptrace64aix (PTT_READ_VEC, tid, (long long) &vmx, 0, 0); else ret = ptrace32 (PTT_READ_VEC, tid, (uintptr_t) &vmx, 0, 0); if (ret < 0) memset(&vmx, 0, sizeof(__vmx_context_t)); for (i = 0; i < ppc_num_vrs; i++) regcache->raw_supply (tdep->ppc_vr0_regnum + i, &(vmx.__vr[i])); regcache->raw_supply (tdep->ppc_vrsave_regnum, &(vmx.__vrsave)); regcache->raw_supply (tdep->ppc_vrsave_regnum - 1, &(vmx.__vscr)); } /* vsx registers. */ if (tdep->ppc_vsr0_upper_regnum != -1) { __vsx_context_t vsx; int ret = 0; if (data->arch64) ret = ptrace64aix (PTT_READ_VSX, tid, (long long) &vsx, 0, 0); else ret = ptrace32 (PTT_READ_VSX, tid, (long long) &vsx, 0, 0); if (ret < 0) memset(&vsx, 0, sizeof(__vsx_context_t)); for (i = 0; i < ppc_num_vshrs; i++) regcache->raw_supply (tdep->ppc_vsr0_upper_regnum + i, &(vsx.__vsr_dw1[i])); } /* Floating-point registers. */ if (ppc_floating_point_unit_p (gdbarch) && (regno == -1 || (regno >= tdep->ppc_fp0_regnum && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))) { if (!ptrace32 (PTT_READ_FPRS, tid, (uintptr_t) fprs, 0, NULL)) memset (fprs, 0, sizeof (fprs)); supply_fprs (regcache, fprs); } /* Special-purpose registers. */ if (regno == -1 || special_register_p (gdbarch, regno)) { if (data->arch64) { if (!ptrace64aix (PTT_READ_SPRS, tid, (unsigned long) &sprs64, 0, NULL)) memset (&sprs64, 0, sizeof (sprs64)); supply_sprs64 (regcache, sprs64.pt_iar, sprs64.pt_msr, sprs64.pt_cr, sprs64.pt_lr, sprs64.pt_ctr, sprs64.pt_xer, sprs64.pt_fpscr); } else { if (!ptrace32 (PTT_READ_SPRS, tid, (uintptr_t) &sprs32, 0, NULL)) memset (&sprs32, 0, sizeof (sprs32)); supply_sprs32 (regcache, sprs32.pt_iar, sprs32.pt_msr, sprs32.pt_cr, sprs32.pt_lr, sprs32.pt_ctr, sprs32.pt_xer, sprs32.pt_fpscr); if (tdep->ppc_mq_regnum >= 0) regcache->raw_supply (tdep->ppc_mq_regnum, (char *) &sprs32.pt_mq); } } } /* Fetch register REGNO if != -1 or all registers otherwise from the thread/process connected to REGCACHE. */ void aix_thread_target::fetch_registers (struct regcache *regcache, int regno) { struct thread_info *thread; pthdb_tid_t tid; /* If a new inferior is born, then its pthread debug library is yet to initialised and hence has no private data. So the below if condition exists. */ if (regcache->ptid ().tid () == 0) beneath ()->fetch_registers (regcache, regno); else { thread = current_inferior ()->find_thread (regcache->ptid ()); aix_thread_info *priv = get_aix_thread_info (thread); tid = priv->tid; if (tid == PTHDB_INVALID_TID) fetch_regs_user_thread (regcache, priv->pdtid); else fetch_regs_kernel_thread (regcache, regno, tid); } } /* Fill altivec registers. */ static void fill_altivec (const struct regcache *regcache, __vmx_context_t *vmx) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); int regno; for (regno = 0; regno < ppc_num_vrs; regno++) if (REG_VALID == regcache->get_register_status (tdep->ppc_vr0_regnum + regno)) regcache->raw_collect (tdep->ppc_vr0_regnum + regno, &(vmx->__vr[regno])); if (REG_VALID == regcache->get_register_status (tdep->ppc_vrsave_regnum)) regcache->raw_collect (tdep->ppc_vrsave_regnum, &(vmx->__vrsave)); if (REG_VALID == regcache->get_register_status (tdep->ppc_vrsave_regnum - 1)) regcache->raw_collect (tdep->ppc_vrsave_regnum - 1, &(vmx->__vscr)); } /* Fill vsx registers. */ static void fill_vsx (const struct regcache *regcache, __vsx_context_t *vsx) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); int regno; for (regno = 0; regno < ppc_num_vshrs; regno++) if (REG_VALID == regcache->get_register_status ( tdep->ppc_vsr0_upper_regnum + regno)) regcache->raw_collect (tdep->ppc_vsr0_upper_regnum + regno, &(vsx->__vsr_dw1[0]) + regno); } /* Store the gp registers into an array of uint32_t or uint64_t. */ static void fill_gprs64 (const struct regcache *regcache, uint64_t *vals) { ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (regcache->arch ()); int regno; for (regno = 0; regno < ppc_num_gprs; regno++) if (REG_VALID == regcache->get_register_status (tdep->ppc_gp0_regnum + regno)) regcache->raw_collect (tdep->ppc_gp0_regnum + regno, vals + regno); } static void fill_gprs32 (const struct regcache *regcache, uint32_t *vals) { ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (regcache->arch ()); int regno; for (regno = 0; regno < ppc_num_gprs; regno++) if (REG_VALID == regcache->get_register_status (tdep->ppc_gp0_regnum + regno)) regcache->raw_collect (tdep->ppc_gp0_regnum + regno, vals + regno); } /* Store the floating point registers into a double array. */ static void fill_fprs (const struct regcache *regcache, double *vals) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); int regno; /* This function should never be called on architectures without floating-point registers. */ gdb_assert (ppc_floating_point_unit_p (gdbarch)); for (regno = tdep->ppc_fp0_regnum; regno < tdep->ppc_fp0_regnum + ppc_num_fprs; regno++) if (REG_VALID == regcache->get_register_status (regno)) regcache->raw_collect (regno, vals + regno - tdep->ppc_fp0_regnum); } /* Store the special registers into the specified 64-bit and 32-bit locations. */ static void fill_sprs64 (const struct regcache *regcache, uint64_t *iar, uint64_t *msr, uint32_t *cr, uint64_t *lr, uint64_t *ctr, uint32_t *xer, uint32_t *fpscr) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); /* Verify that the size of the size of the IAR buffer is the same as the raw size of the PC (in the register cache). If they're not, then either GDB has been built incorrectly, or there's some other kind of internal error. To be really safe, we should check all of the sizes. */ gdb_assert (sizeof (*iar) == register_size (gdbarch, gdbarch_pc_regnum (gdbarch))); if (REG_VALID == regcache->get_register_status (gdbarch_pc_regnum (gdbarch))) regcache->raw_collect (gdbarch_pc_regnum (gdbarch), iar); if (REG_VALID == regcache->get_register_status (tdep->ppc_ps_regnum)) regcache->raw_collect (tdep->ppc_ps_regnum, msr); if (REG_VALID == regcache->get_register_status (tdep->ppc_cr_regnum)) regcache->raw_collect (tdep->ppc_cr_regnum, cr); if (REG_VALID == regcache->get_register_status (tdep->ppc_lr_regnum)) regcache->raw_collect (tdep->ppc_lr_regnum, lr); if (REG_VALID == regcache->get_register_status (tdep->ppc_ctr_regnum)) regcache->raw_collect (tdep->ppc_ctr_regnum, ctr); if (REG_VALID == regcache->get_register_status (tdep->ppc_xer_regnum)) regcache->raw_collect (tdep->ppc_xer_regnum, xer); if (tdep->ppc_fpscr_regnum >= 0 && REG_VALID == regcache->get_register_status (tdep->ppc_fpscr_regnum)) regcache->raw_collect (tdep->ppc_fpscr_regnum, fpscr); } static void fill_sprs32 (const struct regcache *regcache, uint32_t *iar, uint32_t *msr, uint32_t *cr, uint32_t *lr, uint32_t *ctr, uint32_t *xer, uint32_t *fpscr) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); /* Verify that the size of the size of the IAR buffer is the same as the raw size of the PC (in the register cache). If they're not, then either GDB has been built incorrectly, or there's some other kind of internal error. To be really safe, we should check all of the sizes. */ gdb_assert (sizeof (*iar) == register_size (gdbarch, gdbarch_pc_regnum (gdbarch))); if (REG_VALID == regcache->get_register_status (gdbarch_pc_regnum (gdbarch))) regcache->raw_collect (gdbarch_pc_regnum (gdbarch), iar); if (REG_VALID == regcache->get_register_status (tdep->ppc_ps_regnum)) regcache->raw_collect (tdep->ppc_ps_regnum, msr); if (REG_VALID == regcache->get_register_status (tdep->ppc_cr_regnum)) regcache->raw_collect (tdep->ppc_cr_regnum, cr); if (REG_VALID == regcache->get_register_status (tdep->ppc_lr_regnum)) regcache->raw_collect (tdep->ppc_lr_regnum, lr); if (REG_VALID == regcache->get_register_status (tdep->ppc_ctr_regnum)) regcache->raw_collect (tdep->ppc_ctr_regnum, ctr); if (REG_VALID == regcache->get_register_status (tdep->ppc_xer_regnum)) regcache->raw_collect (tdep->ppc_xer_regnum, xer); if (tdep->ppc_fpscr_regnum >= 0 && REG_VALID == regcache->get_register_status (tdep->ppc_fpscr_regnum)) regcache->raw_collect (tdep->ppc_fpscr_regnum, fpscr); } /* Store all registers into pthread PDTID, which doesn't have a kernel thread. It's possible to store a single register into a non-kernel pthread, but I doubt it's worth the effort. */ static void store_regs_user_thread (const struct regcache *regcache, pthdb_pthread_t pdtid) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); int status, i; pthdb_context_t ctx; uint32_t int32; uint64_t int64; struct aix_thread_variables *data; data = get_thread_data_helper_for_ptid (inferior_ptid); int ret; __vmx_context_t vmx; __vsx_context_t vsx; if (debug_aix_thread) gdb_printf (gdb_stdlog, "store_regs_user_thread %lx\n", (long) pdtid); /* Retrieve the thread's current context for its non-register values. */ status = pthdb_pthread_context (data->pd_session, pdtid, &ctx); if (status != PTHDB_SUCCESS) error (_("aix-thread: store_registers: pthdb_pthread_context returned %s"), pd_status2str (status)); /* Fill altivec-registers. */ if (__power_vmx()) { memset(&vmx, 0, sizeof(__vmx_context_t)); for (i = 0; i < ppc_num_vrs; i++) if (REG_VALID == regcache->get_register_status (tdep->ppc_vr0_regnum + i)) { regcache->raw_collect (tdep->ppc_vr0_regnum + i, &(vmx.__vr[i])); ctx.vmx.__vr[i] = vmx.__vr[i]; } if (REG_VALID == regcache->get_register_status (tdep->ppc_vrsave_regnum)) ctx.vmx.__vrsave = vmx.__vrsave; if (REG_VALID == regcache->get_register_status (tdep->ppc_vrsave_regnum - 1)) ctx.vmx.__vscr = vmx.__vscr; } /* Fill vsx registers. */ if (__power_vsx()) { memset(&vsx, 0, sizeof(__vsx_context_t)); for (i = 0; i < ppc_num_vshrs; i++) if (REG_VALID == regcache->get_register_status (tdep->ppc_vsr0_regnum + i)) { regcache->raw_collect (tdep->ppc_vr0_regnum + i, &(vsx.__vsr_dw1[i])); ctx.vsx.__vsr_dw1[i] = vsx.__vsr_dw1[i]; } } /* Collect general-purpose register values from the regcache. */ for (i = 0; i < ppc_num_gprs; i++) if (REG_VALID == regcache->get_register_status (tdep->ppc_gp0_regnum + i)) { if (data->arch64) { regcache->raw_collect (tdep->ppc_gp0_regnum + i, (void *) &int64); ctx.gpr[i] = int64; } else { regcache->raw_collect (tdep->ppc_gp0_regnum + i, (void *) &int32); ctx.gpr[i] = int32; } } /* Collect floating-point register values from the regcache. */ if (ppc_floating_point_unit_p (gdbarch)) fill_fprs (regcache, ctx.fpr); /* Special registers (always kept in ctx as 64 bits). */ if (data->arch64) { fill_sprs64 (regcache, &ctx.iar, &ctx.msr, &ctx.cr, &ctx.lr, &ctx.ctr, &ctx.xer, &ctx.fpscr); } else { /* Problem: ctx.iar etc. are 64 bits, but raw_registers are 32. Solution: use 32-bit temp variables. */ uint32_t tmp_iar, tmp_msr, tmp_cr, tmp_lr, tmp_ctr, tmp_xer, tmp_fpscr; fill_sprs32 (regcache, &tmp_iar, &tmp_msr, &tmp_cr, &tmp_lr, &tmp_ctr, &tmp_xer, &tmp_fpscr); if (REG_VALID == regcache->get_register_status (gdbarch_pc_regnum (gdbarch))) ctx.iar = tmp_iar; if (REG_VALID == regcache->get_register_status (tdep->ppc_ps_regnum)) ctx.msr = tmp_msr; if (REG_VALID == regcache->get_register_status (tdep->ppc_cr_regnum)) ctx.cr = tmp_cr; if (REG_VALID == regcache->get_register_status (tdep->ppc_lr_regnum)) ctx.lr = tmp_lr; if (REG_VALID == regcache->get_register_status (tdep->ppc_ctr_regnum)) ctx.ctr = tmp_ctr; if (REG_VALID == regcache->get_register_status (tdep->ppc_xer_regnum)) ctx.xer = tmp_xer; if (REG_VALID == regcache->get_register_status (tdep->ppc_xer_regnum)) ctx.fpscr = tmp_fpscr; } status = pthdb_pthread_setcontext (data->pd_session, pdtid, &ctx); if (status != PTHDB_SUCCESS) error (_("aix-thread: store_registers: " "pthdb_pthread_setcontext returned %s"), pd_status2str (status)); } /* Store register REGNO if != -1 or all registers otherwise into kernel thread TID. AIX provides a way to set all of a kernel thread's GPRs, FPRs, or SPRs, but there's no way to set individual registers within those groups. Therefore, if REGNO != -1, this function stores an entire group. */ static void store_regs_kernel_thread (const struct regcache *regcache, int regno, pthdb_tid_t tid) { struct gdbarch *gdbarch = regcache->arch (); ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); uint64_t gprs64[ppc_num_gprs]; uint32_t gprs32[ppc_num_gprs]; double fprs[ppc_num_fprs]; struct ptxsprs sprs64; struct ptsprs sprs32; struct aix_thread_variables *data; int ret = 0; data = get_thread_data_helper_for_ptid (regcache->ptid ()); if (debug_aix_thread) gdb_printf (gdb_stdlog, "store_regs_kernel_thread tid=%lx regno=%d\n", (long) tid, regno); /* General-purpose registers. */ if (regno == -1 || (tdep->ppc_gp0_regnum <= regno && regno < tdep->ppc_gp0_regnum + ppc_num_fprs)) { if (data->arch64) { /* Pre-fetch: some regs may not be in the cache. */ ptrace64aix (PTT_READ_GPRS, tid, (unsigned long) gprs64, 0, NULL); fill_gprs64 (regcache, gprs64); ptrace64aix (PTT_WRITE_GPRS, tid, (unsigned long) gprs64, 0, NULL); } else { /* Pre-fetch: some regs may not be in the cache. */ ptrace32 (PTT_READ_GPRS, tid, (uintptr_t) gprs32, 0, NULL); fill_gprs32 (regcache, gprs32); ptrace32 (PTT_WRITE_GPRS, tid, (uintptr_t) gprs32, 0, NULL); } } /* Floating-point registers. */ if (ppc_floating_point_unit_p (gdbarch) && (regno == -1 || (regno >= tdep->ppc_fp0_regnum && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))) { /* Pre-fetch: some regs may not be in the cache. */ ptrace32 (PTT_READ_FPRS, tid, (uintptr_t) fprs, 0, NULL); fill_fprs (regcache, fprs); ptrace32 (PTT_WRITE_FPRS, tid, (uintptr_t) fprs, 0, NULL); } /* Special-purpose registers. */ if (regno == -1 || special_register_p (gdbarch, regno)) { if (data->arch64) { /* Pre-fetch: some registers won't be in the cache. */ ptrace64aix (PTT_READ_SPRS, tid, (unsigned long) &sprs64, 0, NULL); fill_sprs64 (regcache, &sprs64.pt_iar, &sprs64.pt_msr, &sprs64.pt_cr, &sprs64.pt_lr, &sprs64.pt_ctr, &sprs64.pt_xer, &sprs64.pt_fpscr); ptrace64aix (PTT_WRITE_SPRS, tid, (unsigned long) &sprs64, 0, NULL); } else { /* The contents of "struct ptspr" were declared as "unsigned long" up to AIX 5.2, but are "unsigned int" since 5.3. Use temporaries to work around this problem. Also, add an assert here to make sure we fail if the system header files use "unsigned long", and the size of that type is not what the headers expect. */ uint32_t tmp_iar, tmp_msr, tmp_cr, tmp_lr, tmp_ctr, tmp_xer, tmp_fpscr; gdb_assert (sizeof (sprs32.pt_iar) == 4); /* Pre-fetch: some registers won't be in the cache. */ ptrace32 (PTT_READ_SPRS, tid, (uintptr_t) &sprs32, 0, NULL); fill_sprs32 (regcache, &tmp_iar, &tmp_msr, &tmp_cr, &tmp_lr, &tmp_ctr, &tmp_xer, &tmp_fpscr); sprs32.pt_iar = tmp_iar; sprs32.pt_msr = tmp_msr; sprs32.pt_cr = tmp_cr; sprs32.pt_lr = tmp_lr; sprs32.pt_ctr = tmp_ctr; sprs32.pt_xer = tmp_xer; sprs32.pt_fpscr = tmp_fpscr; if (tdep->ppc_mq_regnum >= 0) if (REG_VALID == regcache->get_register_status (tdep->ppc_mq_regnum)) regcache->raw_collect (tdep->ppc_mq_regnum, &sprs32.pt_mq); ptrace32 (PTT_WRITE_SPRS, tid, (uintptr_t) &sprs32, 0, NULL); } } /* Vector registers. */ if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1 && (regno == -1 || (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum))) { __vmx_context_t vmx; if (__power_vmx()) { if (data->arch64) ret = ptrace64aix (PTT_READ_VEC, tid, (long long) &vmx, 0, 0); else ret = ptrace32 (PTT_READ_VEC, tid, (long long) &vmx, 0, 0); if (ret > 0) { fill_altivec(regcache, &vmx); if (data->arch64) ret = ptrace64aix (PTT_WRITE_VEC, tid, (long long) &vmx, 0, 0); else ret = ptrace32 (PTT_WRITE_VEC, tid, (long long) &vmx, 0, 0); if (ret < 0) perror_with_name (_("Unable to store AltiVec register after read")); } } } /* VSX registers. */ if (tdep->ppc_vsr0_upper_regnum != -1 && (regno == -1 || (regno >=tdep->ppc_vsr0_upper_regnum && regno < tdep->ppc_vsr0_upper_regnum + ppc_num_vshrs))) { __vsx_context_t vsx; if (__power_vsx()) { if (data->arch64) ret = ptrace64aix (PTT_READ_VSX, tid, (long long) &vsx, 0, 0); else ret = ptrace32 (PTT_READ_VSX, tid, (long long) &vsx, 0, 0); if (ret > 0) { fill_vsx (regcache, &vsx); if (data->arch64) ret = ptrace64aix (PTT_WRITE_VSX, tid, (long long) &vsx, 0, 0); else ret = ptrace32 (PTT_WRITE_VSX, tid, (long long) &vsx, 0, 0); if (ret < 0) perror_with_name (_("Unable to store VSX register after read")); } } } } /* Store gdb's current view of the register set into the thread/process connected to REGCACHE. */ void aix_thread_target::store_registers (struct regcache *regcache, int regno) { struct thread_info *thread; pthdb_tid_t tid; if (regcache->ptid ().tid () == 0) beneath ()->store_registers (regcache, regno); else { thread = current_inferior ()->find_thread (regcache->ptid ()); aix_thread_info *priv = get_aix_thread_info (thread); tid = priv->tid; if (tid == PTHDB_INVALID_TID) store_regs_user_thread (regcache, priv->pdtid); else store_regs_kernel_thread (regcache, regno, tid); } } /* Implement the to_xfer_partial target_ops method. */ enum target_xfer_status aix_thread_target::xfer_partial (enum target_object object, const char *annex, gdb_byte *readbuf, const gdb_byte *writebuf, ULONGEST offset, ULONGEST len, ULONGEST *xfered_len) { scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid); inferior_ptid = ptid_t (inferior_ptid.pid ()); return beneath ()->xfer_partial (object, annex, readbuf, writebuf, offset, len, xfered_len); } /* Clean up after the inferior exits. */ void aix_thread_target::mourn_inferior () { target_ops *beneath = this->beneath (); pd_disable (current_inferior ()); beneath->mourn_inferior (); } /* Return whether thread PID is still valid. */ bool aix_thread_target::thread_alive (ptid_t ptid) { if (ptid.tid () == 0) return beneath ()->thread_alive (ptid); /* We update the thread list every time the child stops, so all valid threads should be in the thread list. */ process_stratum_target *proc_target = current_inferior ()->process_target (); return in_thread_list (proc_target, ptid); } /* Return a printable representation of composite PID for use in "info threads" output. */ std::string aix_thread_target::pid_to_str (ptid_t ptid) { if (ptid.tid () == 0) return beneath ()->pid_to_str (ptid); return string_printf (_("Thread %s"), pulongest (ptid.tid ())); } /* Return a printable representation of extra information about THREAD, for use in "info threads" output. */ const char * aix_thread_target::extra_thread_info (struct thread_info *thread) { int status; pthdb_pthread_t pdtid; pthdb_tid_t tid; pthdb_state_t state; pthdb_suspendstate_t suspendstate; pthdb_detachstate_t detachstate; int cancelpend; static char *ret = NULL; struct aix_thread_variables *data; data = get_thread_data_helper_for_ptid (thread->ptid); if (thread->ptid.tid () == 0) return NULL; string_file buf; aix_thread_info *priv = get_aix_thread_info (thread); pdtid = priv->pdtid; tid = priv->tid; if (tid != PTHDB_INVALID_TID) /* i18n: Like "thread-identifier %d, [state] running, suspended" */ buf.printf (_("tid %d"), (int)tid); status = pthdb_pthread_state (data->pd_session, pdtid, &state); if (status != PTHDB_SUCCESS) state = PST_NOTSUP; buf.printf (", %s", state2str (state)); status = pthdb_pthread_suspendstate (data->pd_session, pdtid, &suspendstate); if (status == PTHDB_SUCCESS && suspendstate == PSS_SUSPENDED) /* i18n: Like "Thread-Id %d, [state] running, suspended" */ buf.printf (_(", suspended")); status = pthdb_pthread_detachstate (data->pd_session, pdtid, &detachstate); if (status == PTHDB_SUCCESS && detachstate == PDS_DETACHED) /* i18n: Like "Thread-Id %d, [state] running, detached" */ buf.printf (_(", detached")); pthdb_pthread_cancelpend (data->pd_session, pdtid, &cancelpend); if (status == PTHDB_SUCCESS && cancelpend) /* i18n: Like "Thread-Id %d, [state] running, cancel pending" */ buf.printf (_(", cancel pending")); buf.write ("", 1); xfree (ret); /* Free old buffer. */ ret = xstrdup (buf.c_str ()); return ret; } ptid_t aix_thread_target::get_ada_task_ptid (long lwp, ULONGEST thread) { return ptid_t (inferior_ptid.pid (), 0, thread); } /* Module startup initialization function, automagically called by init.c. */ void _initialize_aix_thread (); void _initialize_aix_thread () { /* Notice when object files get loaded and unloaded. */ gdb::observers::new_objfile.attach (new_objfile, "aix-thread"); /* Add ourselves to inferior_created event chain. This is needed to enable the thread target on "attach". */ gdb::observers::inferior_created.attach (aix_thread_inferior_created, "aix-thread"); add_setshow_boolean_cmd ("aix-thread", class_maintenance, &debug_aix_thread, _("Set debugging of AIX thread module."), _("Show debugging of AIX thread module."), _("Enables debugging output (used to debug GDB)."), NULL, NULL, /* FIXME: i18n: Debugging of AIX thread module is \"%d\". */ &setdebuglist, &showdebuglist); }


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