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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-08-07 08:30:42 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-07 08:30:42 -0400 |
| commit | 0c25f85e5b88102363c0cd55e1946053d5827e99 (patch) | |
| tree | dcf0eebce153b7f29762ad0426672c663fb3c3b9 /clang/lib/Basic/IdentifierTable.cpp | |
| parent | e3778a5d0ee78f3161f1d060c6db1c0dd0de6c4e (diff) | |
| download | llvm-0c25f85e5b88102363c0cd55e1946053d5827e99.zip llvm-0c25f85e5b88102363c0cd55e1946053d5827e99.tar.gz llvm-0c25f85e5b88102363c0cd55e1946053d5827e99.tar.bz2 | |
[RISCV] Add sifive-p470 processor (#102022)
This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p450-470.
Use the existing P400 scheduler model. This model is missing accurate
vector scheduling support, but it will be added in a follow up patch.
Other tunings can come in future patches too.
Diffstat (limited to 'clang/lib/Basic/IdentifierTable.cpp')
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