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| author | Ivan Kosarev <ivan.kosarev@amd.com> | 2025-09-16 09:01:01 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-16 09:01:01 +0100 |
| commit | 7ba702195136b448d6f35ae3ea4075059cb0df82 (patch) | |
| tree | c4c9f45b8bc41c8963fa4f0cec1e663dd9e51cfc /clang/lib/AST/ByteCode/Compiler.cpp | |
| parent | 5169bb4c812c1006f4ecfa4bded7aa92d35e3b72 (diff) | |
| download | llvm-7ba702195136b448d6f35ae3ea4075059cb0df82.zip llvm-7ba702195136b448d6f35ae3ea4075059cb0df82.tar.gz llvm-7ba702195136b448d6f35ae3ea4075059cb0df82.tar.bz2 | |
[AMDGPU][MC] Keep MCOperands unencoded. (#158685)
We have proper encoding facilities to encode operands and instructions;
there's no need to pollute the MC representation with encoding details.
Supposed to be an NFCI, but happens to fix some re-encoded instruction
codes in disassembler tests.
The 64-bit operands are to be addressed in following patches introducing
MC-level representation for lit() and lit64() modifiers, to then be
respected by both the assembler and disassembler.
Diffstat (limited to 'clang/lib/AST/ByteCode/Compiler.cpp')
0 files changed, 0 insertions, 0 deletions