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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-10-04 00:10:02 +0900 |
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committer | GitHub <noreply@github.com> | 2025-10-04 00:10:02 +0900 |
commit | 3c6cd732eb59b50fa2394f659763f5d216b76703 (patch) | |
tree | 4c2de9e4e5eb228761294a8f30eba9b89ade86e1 /clang/lib/AST/ByteCode/Compiler.cpp | |
parent | fee840deb75842ec80ff9aed1c35e6c60d095d29 (diff) | |
download | llvm-3c6cd732eb59b50fa2394f659763f5d216b76703.zip llvm-3c6cd732eb59b50fa2394f659763f5d216b76703.tar.gz llvm-3c6cd732eb59b50fa2394f659763f5d216b76703.tar.bz2 |
CodeGen: Do not store RegisterClass copy costs as a signed value (#161786)
Tolerate setting negative values in tablegen, and store them as a
saturated uint8_t value. This will allow naive uses of the copy cost
to directly add it as a cost without considering the degenerate negative
case. The degenerate negative cases are only used in InstrEmitter / DAG
scheduling, so leave the special case processing there. There are also
fixmes about this system already there.
This is the expedient fix for an out of tree target regression
after #160084. Currently targets can set a negative copy cost to mark
copies as "impossible". However essentially all the in-tree uses only
uses this for non-allocatable condition registers. We probably should
replace the InstrEmitter/DAG scheduler uses with a more direct check
for a copyable register but that has test changes.
Diffstat (limited to 'clang/lib/AST/ByteCode/Compiler.cpp')
0 files changed, 0 insertions, 0 deletions